ASIC Digital Design Expert (f/m/div)

In our Dresden development center, we design the next generation of ASICs driving leading-edge consumer applications worldwide. As a part of our team, you will be at the heart of innovation, shaping the technology of tomorrow.

We are seeking a highly skilled and motivated Digital Design Expert to take responsibility for the digital designs of our advanced Mixed-Signal and System-on-Chip (SoC) ASICs.

- You will be a key member in our interdisciplinary teams, developing digital ASIC components for consumer ICs, driving them from the specification and initial concept all the way through to final RTL implementation and lab validation
- You will uphold our “First Time Right” design philosophy by conducting comprehensive simulations on multiple abstraction levels, such as on behavioral HDL model and on gate level netlist
- You will own the entire development cycle for digital block-levels from definition, through implementation phase and initial verification; this encompasses authoring detailed specifications, development of high-quality RTL code including performance of structural checks (linting), execution of functional & power simulations, conduction of associated debug analysis and creation of comprehensive documentation
- You will thrive in an international environment, working and communicating with a globally distributed team of experts to achieve common goals
- You will play an active role in the continuous improvement of our digital design methodologies and verification strategies, helping us stay at the forefront of the consumer industry

Responsibilities

Taking responsibility for the digital designs of advanced Mixed-Signal and System-on-Chip (SoC) ASICs; Being a key member in interdisciplinary teams, developing digital ASIC components for consumer ICs, driving them from specification and initial concept through final RTL implementation and lab validation; Upholding the 'First Time Right' design philosophy by conducting comprehensive simulations on multiple abstraction levels, such as behavioral HDL model and gate level netlist; Owning the entire development cycle for digital block-levels from definition, through implementation phase and initial verification, including authoring detailed specifications, development of high-quality RTL code, performance of structural checks (linting), execution of functional and power simulations, conduction of associated debug analysis and creation of comprehensive documentation; Working and communicating with a globally distributed team of experts; Playing an active role in continuous improvement of digital design methodologies and verification strategies

Requirements

High level of enthusiasm, creativity, and willingness to collaborate within international and interdisciplinary teams; Effective team player with focused, methodical, and highly independent working style; At least 5 years of professional industry experience in digital design; Deep understanding of VHDL and/or Verilog hardware description languages; Strong expertise with state-of-the-art digital design EDA tools; Experience in digital data processing and low-power design techniques; Familiarity with Design-for-Testability (DfT) concepts; Proficient English; Degree (Diploma/M.Sc.) in Electrical Engineering or equivalent field with outstanding academic results

Nice to have

Professional experience in team leadership; Advanced German language skills; Proficiency in scripting/programming languages such as Python or confident usage of AI-powered tools; Familiarity with Cadence, Siemens, and Synopsys tool chains

Benefits

Great opportunities for mobile working; Different part-time models or job-sharing