Power-Domain Verification Lead

Axiado is building the future of AIpowered digital infrastructure. We are a fastgrowing, wellfunded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AIdriven resilience and efficiency, and realtime platform management. Our technology protects the world’s most critical infrastructure—from data centers to nextgeneration cloud and AI platforms—by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems.

Founded in 2019 and now over 150 employees strong, Axiado has evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders, validating both our technology and our long-term market trajectory. Axiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Company’s 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliance’s 2025 “Start-Up to Watch” award.

At Axiado, developing breakthrough technology takes more than great engineering—it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.

If you’re driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.

Verification Lead Power Aware Simulation position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.

You should have prior knowledge and experience in power aware simulations with UPF verification and UVM testbench development.

You will be responsible for RTL SoC/Subsystem verification based on ARM CPUs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering, Verification.

ACADEMIC CREDENTIALS

- BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent

Responsibilities

Execute power-aware simulations and debug failures related to power intent; Integrate UPF with UVM testbenches and VIPs; Expertise in verifying design at RTL (SOC) level and gate-level simulation; Create directed and constrained-random tests for low-power scenarios; Verify:; Power gating; Isolation; Retention save/restore; Reset behavior across power domains; Develop assertions and functional coverage for power states and transitions; Support power-aware regression and sign-off; Fluency with scripting languages (e.g., Make, Perl, Python, Shell); Collaborating with RTL, power architects

Requirements

10+ years of experience with strong hands-on experience with SystemVerilog & UVM; Solid understanding of UPF / power intent modeling; Experience with power-aware simulation; Knowledge of:; Power domains & power states; Isolation, retention, level shifters; Reset vs power interactions; Strong debug skills across RTL, UPF, and testbench