Verification CAD Lead

Grow with us. Are you ready to drive and shape the future of Ericsson Silicon’s methodology and tools? Join our dynamic team within the newly established Frontend CAD department, dedicated to defining methodologies and EDA workflows across our global R&D sites located in Austin, Stockholm, and Lund. At Ericsson Silicon we are at the forefront of technological innovation, driving advancements in ASIC IP and SoC development. We pride ourselves on fostering a dynamic and inclusive work environment where groundbreaking ideas are turned into reality. We are seeking a seasoned Silicon IP/Verification Methodology Lead to join our team and lead our verification strategy.

Responsibilities

Play a critical role in shaping and executing verification methodology for ASIC IP and SoC development; Leverage extensive experience and expertise to drive efficiency, ensure quality, and implement best practices across verification processes; Lead the development and implementation of advanced verification methodologies for ASIC IP and SoC projects; Oversee the verification lifecycle, from planning and testbench development to execution and closure; Collaborate with cross-functional teams to define verification requirements and ensure alignment with overall project goals; Drive the adoption of cutting-edge verification tools and technologies to improve productivity and quality; Mentor and guide junior verification engineers, fostering a culture of continuous learning and improvement; Analyze and resolve complex verification issues, ensuring timely delivery of high-quality IP and SoC designs; Maintain up-to-date knowledge of industry trends and advancements in verification techniques and methodologies; Develop and implement metrics to measure and improve verification effectiveness and efficiency; Work closely with the design and architecture teams to identify potential verification challenges and develop strategies to address them

Requirements

Deep expertise in ASIC IP/ASIC SoC design, RTL, Verilog, and System Verilog; Proficiency in front-end tools including Verilog simulators, linters, clock domain crossing checkers; Familiarity with synthesis, static timing analysis, Design-For-Test (DFT); Proficiency in scripting languages such as Perl and Python; Extensive understanding of modern design methodologies and techniques; Experience in coordinating and supporting geographically dispersed engineering teams; Strong communication and presentation skills; Self-driven with the ability to manage engineering loads across multiple teams; Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field; 15+ years of experience in IP/SoC verification, with a proven track record of successful project deliveries; Deep understanding of verification methodologies, including UVM, OVM, and formal verification techniques; Extensive experience with verification tools such as VCS and Xcelium; Strong programming skills in SystemVerilog, Verilog, and scripting languages (e.g., Python); Excellent problem-solving skills and the ability to analyze and resolve complex verification issues; Proven leadership abilities, with experience managing and mentoring verification teams; Strong communication skills, with the ability to effectively collaborate with cross-functional teams; A proactive and innovative mindset, with a passion for driving continuous improvement

Nice to have

Knowledge of System-Verilog assertions, checkers, and advanced design verification techniques is advantageous

Benefits

Competitive compensation package; Short-Term Variable Compensation Plan with annual bonus opportunity; Health benefits including choice of three medical plan options and a dental plan option; Company credits for medical and dental premiums; 401(k) Plan with automatic 3% company contribution and matching contributions up to 4%; Company credits for basic life insurance, accidental death and dismemberment coverage, short-term and long-term disability coverage; Stock Purchase Plan; Minimum 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually; Up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% pay; Financial wellness programs, educational assistance, matching gifts, and recognition programs