Principal Analog Design Engineer

We are seeking a Principal Analog Design Engineer to serve as a global technical authority and lead the architectural evolution of our PMIC and mixed-signal product lines. This high-impact role spans the entire development lifecycle from early-stage customer collaboration and specification to final silicon verification and production readiness. We are looking for a seasoned expert with over 12 years of experience who can balance technical mastery with strategic mentorship, driving both engineering excellence and company-wide methodology improvements. If you are ready to influence product roadmaps and lead multicultural teams in a collaborative, innovation-first environment, we invite you to help us design the sustainable solutions of tomorrow.

Responsibilities

Lead the full development lifecycle of major analog and mixed-signal blocks and top-level PMIC products, from initial specification through design, simulation, and silicon verification.; Act as a global technical authority and primary point of contact, providing sound architectural recommendations and mentoring engineers to ensure excellence across the design team.; Collaborate directly with customers to define system requirements and develop innovative solutions that meet performance, area, and power constraints.; Oversee high-level verification planning, DFT strategy, and lab evaluation in partnership with applications and test engineering teams to ensure designs are production-ready.; Drive the identification and implementation of company-wide improvements in engineering methodologies, policies, and strategic initiatives.; Support roadmap planning and ensure technical advice is aligned with external market trends and evolving CMOS process technologies.

Requirements

Minimum of 12 to 15 years experience in power management with a proven record of acting as a technical project lead on complex ICs within the last four years.; Degree level qualification in Electronics Engineering or a related discipline.; In depth knowledge of CMOS power management circuits, organizational business objectives, and current market trends.; Demonstrated ability to drive engineering initiatives and process improvements while delivering high-quality results under tight schedule pressure.; Exceptional communication and presentation skills, with the ability to convey complex technical concepts to multicultural teams and external customers.; Proven capability to work independently as a technical lead while fostering a collaborative environment as a role model and mentor.; High cross cultural sensitivity and the flexibility to undertake occasional international travel at short notice.