Senior Manager - ASIC Development Engineering (DFT,MBIST,SCAN)

At Sandisk, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Sandisk is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon.

We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Sandisk is fueling a brighter, smarter future.

Binge-watch any shows, use social media or shop online lately? You’ll find Sandisk supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too.

We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the SanDisk® brands.

Today’s exceptional challenges require your unique skills. It’s You & Sandisk. Together, we’re the next BIG thing in data.

We are seeking a highly skilled and experienced DFT Engineer to join our dynamic team of engineers to develop the next-generation Flash Controllers. As an SoC DFT Engineer, you will be responsible for defining and implementing industry leading DFT solutions, with emphasis on SCAN, MBIST, BSDL etc. The ideal candidate will have a deep understanding of DFT Architecture, Implementation flow, MBIST, SCAN ATPG & Simulation expertise.

Responsibilities

DFT Architecture definitions for SoC development; Leading complex activities and providing solutions for complex DFT problems.; Collaborate with cross-functional teams to define and refine SoC DFT requirements, ensuring alignment with industry standards and customer needs.; Working closely with the Design, Verification, Physical Design & Test Engineering teams while guiding them on the test requirements and methodologies.; Work closely with the Product Engineering team and understand the test requirements, get involved in complex silicon debugs.; Evaluate all aspects of the SoC DFT flow from requirements, through detailed definitions, and work closely with the CAD to continuously improve the DFT methodology.

Requirements

B.Tech / M,Tech / Phd in Electronics, Computer science or Electrical Engineering; Minimum 14+ years of experience in DFT; Strong understanding of DFT Architecture; Extensive experience in SoC DFT architecture, DFT IP development and DFT methodology.; Proven track record of driving DFT architecture in complex ASIC designs.; Work independently on multiple complex DFT problems across different projects.; Proficiency in ASIC DFT Implementation tools, simulation methodologies, and hardware description languages (HDLs).; Proficiency in SCAN, MBIST implementation.; Solid understanding of JTAG & BSDL standards.; Good understanding on Test clocking requirements, Test mode timing closure.; Proficiency in complex silicon debugs and yield analysis.; Solid understanding of SoC architecture and low-power design principles.; Understanding of High-Speed interfaces (PCIe or UFS protocols) and experience with SSD/Flash is advantage.; Excellent analytical and problem-solving skills.; Strong communication skills and the ability to work effectively in cross-functional teams.