Staff RFIC Design Engineer

WD is building the infrastructure behind the AI-driven data economy.

As AI scales, so does data. Every interaction, every model, every system generates data that must be stored, managed, and made accessible over time. That’s where we come in.

We combine deep engineering expertise with global-scale manufacturing to deliver the storage systems that make AI possible, powering hyperscale data centers, cloud platforms, and enterprise infrastructure worldwide.

This isn’t theoretical work. It’s real systems, at real scale, people solving some of the hardest challenges in technology today.

We’re looking for people who want to build, solve, and operate at that level.

Join us and let’s shape the future of data.

Responsibilities

Designer will be responsible for the design of high performance analog and mixed-signal circuit blocks.; Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation.; Job responsibilities require ability to communicate at all levels and with cross functional groups.; Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept constructive criticism

Requirements

Must have hands-on design and development experience in analog and mixed-signal integrated circuit; Must have experience in at least one preferably multiple area of full CMOS circuit design and development in:; Amplifiers – operational, instrumentation, wide-bandwidth etc.; PMIC – Linear and switched regulators, Low-drop out regulators etc.; Data converters – ADC, DAC, Flash and SAR type; Must have experience in 40nm and below CMOS technology; Must have a demonstrable track record of successful design releases and mass production; Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.); Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization; Experience with floor planning, block level routing and top level chip routing; Knowledge of high performance and deep CMOS analog reliability considerations such as EM-IR, SOA and VDR and relevant mitigation techniques; Functional knowledge of logic digital circuits and understanding of basic digital design flow; Experience working with distributed design teams a plus; Must possess strong written and verbal communication skills; BSEE with minimum 10+ years of experience; MSEE with minimum 8+ years of experience; PhD with minimum 4+ years of experience

Benefits

An employee’s pay position within the salary range may be based on several factors including but not limited to (1) relevant education, qualifications, certifications, and experience, (2) skills, ability, knowledge of the job, (3) performance, contribution and results, (4) geographic location, (5) shift, (6) internal and external equity, and (7) business and organizational needs.; The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future.; If your position is non-exempt, you are eligible for overtime pay pursuant to company policy and applicable laws. You may also be eligible for shift differential pay, depending on the shift to which you are assigned.; You will be eligible to be considered for bonuses under either WD’s Short Term Incentive Plan (“STI Plan”) or the Sales Incentive Plan (“SIP”) which provides incentive awards based on Company and individual performance, depending on your role and your performance. You may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to WD's Standard Terms and Conditions for Restricted Stock Unit Awards.; We offer a comprehensive package of benefits including paid vacation time, paid sick leave, medical/dental/vision insurance, life, accident and disability insurance, tax-advantaged flexible spending and health savings accounts, employee assistance program, other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity, tuition reimbursement, transit, the Applause Program, employee stock purchase plan, and the WD Savings 401(k) Plan.; Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law.