ASIC Verification Engineer

Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AI driven resilience and efficiency, and real-time platform management. Our technology protects the world’s most critical infrastructure—from data centers to next generation cloud and AI platforms—by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems.

Founded in 2019 and now over 150 employees are strong, Axiado has evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders, validating both our technology and our long-term market trajectory. Axiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Company’s 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliance’s 2025 “Start-Up to Watch” award.

At Axiado, developing breakthrough technology takes more than great engineering—it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world.

If you’re driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey.

Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.

You will be responsible for RTL SoC/Subsystem verification of ARM based SoCs, and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering (Verification).

Responsibilities

Project Leadership; Help develop test plan definition; Micro-architecture design verification, RTL verification, and documentation; Top-level and block-level functional and performance verification, and system level use-case verification, and; Support test program development, chip validation, and chip life until production maturity.; Team Management and Building; Collaboration with firmware, software, DV, FPGA, DFT, SoC integration, and backend teams throughout various stages of ASIC development.

Requirements

8+ years of experience in UVM verification and UVM environment development (must have); Proficient in test plan definition and testcase development in C/Assembly/System Verilog; Expertise in verifying design at RTL level and gate-level simulation; Good understanding of coverage analysis, performance verification and use-case verification.; Must have worked on AMBA AXI, AHB, APB protocols; Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC, UART, etc.; Experience in functional test vector development and post-silicon bring-up/debug.; Fluency with scripting languages (e.g., Perl, Python, Shell), and; Experience in working with repository management tools like Bitbucket/ Jenkins and bug tracking tools like JIRA.; BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent.