Hardware Platform Security Architect

Trusted Computing and Cryptography is a core security team at OpenAI focused on deploying high-performance cryptography at scale, secure key management, and trusted hardware enclaves—from boot measurements to GPU confidential computation. As a Hardware Platform Security Architect, you’ll own hardware platform security at OpenAI.

Responsibilities

Co-Architect Secure Silicon: Collaborate with cross-functional silicon teams (Silicon Design, DV, FW) and silicon partners (silicon test facilities, foundries) to develop secure silicon that meets the end-to-end system requirements; Co-Architect Secure Hardware: Collaborate with hardware vendors and cross-functional teams (kernel, compiler, infra) to design secure hardware that meets performance and security needs; Co-Architect Secure Systems: Architect and deploy systems using TPM2, Secure Boot, Nitro Enclaves, Intel SGX, AMD-SEV, and other secure hardware technologies; Drive Innovation: Engage with internal and external partners to align hardware innovations with OpenAI’s trusted computing and cryptographic requirements

Requirements

10+ years of industry experience in hardware security or hardware–software co-design; Proven expertise in deploying secure hardware systems at scale and integrating secure hardware primitives; Strong coding skills in Rust and/or C/C++, with proficiency in Python; Proven ability to collaborate across teams, architect solutions, and debug complex production systems; A proactive, ownership-driven mindset with a focus on end-to-end problem solving

Nice to have

Advanced degree in Computer Architecture, Electrical Engineering, or related fields; Familiarity with HPC, low-precision computing, and SIMD architectures