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Principal Engineer, Analog / Mixed-Signal IC Design

Renesas Electronics Kodaira, Japan
Full-time On-site work

Publication date: 27/09/2026

【Role Summary】

We are seeking Principal Analog Engineer to serve as a global technical authority who drives quality, technical execution, and engineering capability across complex integrated circuit development. This role spans the full lifecycle from specification and customer engagement through design, verification, silicon validation, and production readiness. The candidate combines deep technical expertise with the ability to challenge the status quo, drive execution improvements, and elevate organizational performance through strong collaboration across development teams.

Responsibilities

Serve as a global technical authority providing sound technical direction across multiple programs.; Contribute to the architectural definition of the design and chip integration.; Interpret requirements and define strategies balancing key device metrics.; Design analog and mixed-signal circuits meeting architectural requirements and technical specifications.; Provide technical oversight across design, simulation, integration, and debug activities.; Review and guide engineering work to ensure best practices, quality standards, and robust execution.; Guide high-level verification planning and ensure alignment with system requirements.; Support definition of DFT and test strategies to ensure observability and debuggability.; Ensure correlation between simulation, silicon behavior, and system-level performance.; First-silicon success, product quality, and reduction of late-stage design issues.; Improved design execution through technical reviews, and cross-functional alignment.; Growth of technical leadership capability across the organization.

Requirements

Typically 12–15+ years of relevant analog and/or mixed-signal design experience; Degree-level qualification in Electrical Engineering, Electronics; Deep knowledge of product lifecycle, system-level design, verification, validation and DFT
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