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Senior FPGA / RTL Design Engineer - Signal Processing

Silvus Technologies (International) Los Angeles, United States
Hybrid work

Publication date: 29/08/2026

Silvus is seeking a Senior FPGA Design Engineer- Signal Processing reporting to the Director of FPGA Engineering on the FPGA Engineering team. The successful individual in this role will participate in all aspects of the research and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products. In addition, they participate in the support and development of FPGA-based designs for our advanced wireless systems R&D. These are exciting projects targeted to address challenging real-world communication needs.

Responsibilities

Digital design architecting for wireless communication projects; Fixed point design of signal processing blocks while working with systems engineers; RTL coding, simulation, and test bench development; FPGA synthesis and timing closure; Hardware verification and troubleshooting; familiarity with logic analyzers; Provide support to the RF and Software Engineering teams; Perform other related duties of which the above are representative

Requirements

Bachelor of Science degree in Electrical Engineering, Computer Science, or related fields; Minimum 6 years of demonstrated experience in FPGA design; OR 4 years of FPGA design experience with a Master of Science degree; OR 2 years of FPGA design experience with a PhD degree; Demonstrated experience with fixed point binary arithmetic and digital signal processing designs; Proven expertise working with multiple clock-domain, high-utilization FPGA designs; Experience with Xilinx FPGAs, SoCs, and the Vivado IDE; Must be U.S. Person (U.S. Citizen, or Permanent Resident) due to clients under U.S. federal contracts; All employment is contingent upon the successful clearance of a background check and drug test

Nice to have

Master of Science degree in Electrical Engineering (MSEE); Experience using MATLAB; Experience with communication systems on FPGA or ASIC designs
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