Senior Staff Product Engineer - Power / Analog

Renesas is a global semiconductor leader shaping the backbone of next‑generation automotive, industrial, cloud, and IoT innovation. With over $9.3 billion in annual revenue (2024) and a world‑class team of 22,700+ employees, Renesas operates at scale while retaining the agility to drive category‑defining breakthroughs. The company’s footprint spans more than 30 countries, enabling deep customer proximity and a uniquely global innovative engine. As Japan’s semiconductor powerhouse and a top global player in microcontrollers, analog, and power technologies, Renesas delivers real‑world impact across EVs, smart factories, renewable energy infrastructure, and edge intelligence. For ambitious problem‑solvers who want to work on meaningful, systems‑level challenges with huge industry leverage, Renesas offers the scale, stability, and strategic clarity of a market leader—paired with the transformative momentum of a company reinventing how the world computes, connects, and electrifies.

Renesas has a growing presence in India with HC approaching 1000+ and significant presence with active government and university collaboration as well as OSAT footprint (JV with CG India). With the growing importance of India as a market (Growing semiconductor market and government goals / mandates of localization needs) and talent hub, our division’s (India for India) mission is to grow India market. We aspire to create products (SoCs, Software, Power and Analog chips etc) which serve needs for local market. Renesas is a leading electronics supplier globally, and this is a unique opportunity to directly influence the future products which will be offered to our customers in a new, fast growing and large Indian market with specific needs and applications.

The role

This is a product engineering role with technical program ownership. You are the single point of accountability for power/analog products from concept through first silicon, characterization, qualification, production release and sustaining — working across design, package, test, operations, foundry and OSAT teams to get it there.

It is not a yield-analysis role. Yield and outgoing quality are yours, but so are testability and trim strategy before tape-out, package and thermal selection, the NPI schedule, and the cross-functional risk register. If it stands between silicon and shipping product, you own it.

Production and sustaining

- Monitor production data and apply statistical analysis to identify and correct yield, quality and test-time deficiencies; drive yield improvement.
- Optimise PAT, SYL, SBL, SPC and disposition limits to protect outgoing quality.
- Work with planning, manufacturing, subcontractors and operations to remove material-flow obstacles and recover schedule gaps.
- Create and maintain product BOMs and lifecycle data in PLM systems such as Agile; support fab transfer, process change and BOM change activities.
- Support customer-return and RMA investigations by reproducing failures and assessing production test coverage — including electrical overstress and field-stress modes typical of power devices.
- Own the product through end of life , including last-time-buy and discontinuation planning.

Technical leadership

- Provide technical direction and sign off reviews across design, product engineering, operations, suppliers and OSAT teams, including DFX topics.
- Act as the escalation point for product-level technical decisions and drive risk resolution to closure.
- Influence cross-functional teams without direct authority and communicate clearly to stakeholders at every level.
- Mentor product and test engineers and raise the standard of product engineering practice across programs.

Responsibilities

Represent product, test and package requirements in design reviews — test access to analog nodes, trim and OTP strategy, diagnostic and self-test coverage, and the multi-variant bond-out plan where one die serves several products.; Own package and thermal selection and the package development and qualification plan with the package team and OSAT — power dissipation, junction-to-ambient and junction-to-case targets, exposed-pad and board-level reliability considerations.; Own the NPI schedule, milestone gates and cross-functional risk register from concept through production release.; Own product cost — die size and yield entitlement, test time, package, and the unit-cost roadmap across the product life.

Requirements

Own qualification planning and execution in accordance with applicable JEDEC and AEC-Q100 requirements, including the stress set appropriate to power devices — HTOL, power/temperature cycling, and package-level reliability.; Prepare product-release documentation , datasheet parameter tables and compliance evidence, including PPAP evidence where applicable.; Support the functional-safety work products — ensuring production screens and characterization data substantiate the FMEDA and safety manual claims.; Bachelor's degree in electronics, electrical, materials or physics engineering. Advanced degree welcome.; 10+ years of semiconductor experience spanning product engineering, NPI, manufacturing and test — or 8+ with an advanced degree. Concept-to-mass-production ownership of at least one product is essential.; Power or analog product experience — High-voltage or high-current devices, drivers, regulators, power management or similar. This is the core requirement.; Strong grasp of analog and power device behaviour — driver stages, regulators, references and protection circuits — and how they move over process, voltage and temperature.; Practical understanding of wafer fabrication, assembly, test, qualification and production-release flows.; Experience managing engineering wafer starts, prototype builds, customer samples, inventory and product BOMs. .; Familiarity with JEDEC and AEC-Q100 qualification standards , qualification hardware and software, and failure analysis methods.; Experience working with external foundries, OSATs and globally distributed teams.; Fluency with data and statistical methods for managing yield, quality, cycle time and operational priorities.; Clear written and verbal communication , strong planning and coordination skills, and the ability to work under schedule pressure.

Nice to have

Automotive power/analog experience — AEC-Q100 Grade 1 or 0, tri-temp production test, IATF 16949 and PPAP environments.; ISO 26262 exposure — production screens and characterization traced to FMEDA claims, safety-related release evidence.; Experience with a multi-variant die — bond-out or package derivatives sharing one base silicon.; Thermal modelling and SOA analysis experience for power devices.; PLM and yield-management tooling — Agile, PDF Exensio, JMP or equivalent.; Experience with a product from first silicon through a fab or OSAT transfer.