Experienced Engineer - FPGA CAD

You will join the FPGA CAD team to support design and verification teams which focuses on legacy, current, and next-generation Radio/RAN compute products within Ericsson. The new hire will play a critical role in strengthening Ericsson’s silicon strategy by supporting automation and FPGA CAD methodology to enhance the efficiency of a new site in Bangalore.

Responsibilities

Develop, test, and deploy FPGA CAD tools and automation flows to support FPGA product development; Assist in defining design specifications, implementation strategies, CAD methodologies and debugging for FPGA tools and automation flows; Develop and maintain automation scripts for FPGA design and simulation flow and support engineers in resolving tool, environment, and runtime issues by engaging AE teams from suppliers; The automation scripts to include but not be limited to synthesis, place & route, bitstream generation, timing closure, QoR analysis and performance assessment - power estimation, timing analysis for design flow/ compile, elaboration, run, debug, regression and performance assessment – runtime, memory, licenses for simulation flow; Support FPGA design and verification engineers by automating the performance assessment of new tool versions and features; Build and maintain relationships with FPGA project teams to ensure alignment on goals and support timelines; Contribute to the continuous improvement of products, tools, and processes; Follow and contribute to the team’s CAD guidelines, best practices, processes, and documentation standards

Requirements

3 to 5 years of experience in Python software development; Strong understanding of Python idioms, data structures, and object-oriented design; Experience with automated testing (unit, integration) and TDD practices; Ability to understand, reuse existing code effectively and/or write reusable, modular, and well-documented code; Strong experience with scripting languages such as Tcl, Bash, Perl, etc; Familiarity with version control systems such as Git; A problem-solving attitude, self-motivation, and eagerness to learn and contribute; Excellent English verbal and written communication skills; Bachelor’s or Master’s degree in Electronics or Computer Engineering or equivalent

Nice to have

Knowledge of CI/CD tooling such as Jenkins; Familiarity with REST APIs; Experience with relational databases and SQL; Familiarity with FPGA/ASIC development, including ability to read and debug SystemVerilog/Verilog designs; Exposure/Hands-on with FPGA design and RTL simulation tools; Understanding of FPGA design/simulation flow and automation experience; Exposure with FPGA timing constraints (XDC/SDC), QoR analysis, and regression flows; Exposure with FPGA tools (Vivado, Quartus, Radiant)