Senior QA/DV Program Manager

Axiado is seeking a Senior QA/DV Program Manager, a highly skilled and driven Principal Technical Program Manager (TPM), to drive the execution, delivery, and quality assurance of multiple ASIC SOC hardware and BMC software solutions portfolios. The role leads program management for the End-to-End Quality Assurance (QA) team and drives program execution for complex SOC Design Verification (DV) projects. The position involves close work with HW/SW design, verification, validation and system integration engineering teams.

Responsibilities

Track multiple parallel ASIC SOC projects from pre-silicon phases through to final deployment; Coordinate schedules and dependencies between QA, Software, Architecture, Design, and DV teams; Identify technical and schedule bottlenecks early and develop clear mitigation plans; Report key execution metrics and milestone readiness regularly to engineering leadership; Oversee the testing schedule for full server systems and BMC boards hosting the SOC; Drive the end-to-end triaging, tracking, and closure of system-level defects with engineering teams; Manage program dependencies for QA teams validating firmware, security layers, and Linux OS; Track the deployment of automated test regressions running on physical server infrastructure; Drive schedule adherence for block-level, subsystem, and full-chip verification milestones; Monitor pre-silicon bug burn-down rates and prioritize critical fixes to keep tape-out schedules on track; Coordinate with DV team leads to ensure timelines account for coverage of all critical components; Drive reviews, schedule and track dependencies for emulation and FPGA development, and coordinate with design, DV and software teams

Requirements

Bachelor's degree or above in Electrical Engineering, Computer Engineering, Computer Science, or a related field; 7+ years as a Technical Program Manager managing complex silicon or system-level validation programs; Strong understanding of system-level QA frameworks, automated test setups, and server or BMC testing; Familiarity with multi-CPU SOC architectures, hardware security, and interfaces like PCIe, USB, or Ethernet; Basic grasp of pre-silicon Design Verification concepts, coverage metrics, and bug-tracking lifecycles; Proven proficiency with project management tools like Jira and standard hardware/software release processes

Nice to have

Master's degree in EE, CE, CS, or a technical MBA; Proficiency using AI-based tools for program management optimization, action-item tracking, and automated meeting minutes; Direct experience with Baseboard Management Controllers, embedded Linux, or IPMI/Redfish protocols; Understanding of hardware Root-of-Trust, cryptographic accelerators, and secure boot architectures