Staff Engineer – Validation & Characterization (DDR5)

Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas is a global, multi-billion dollar, publicly traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics.

This position is for a hands-on validation and characterization engineer with solid experience across multiple product iterations. The ideal candidate has strong expertise in DDR5/high-speed memory interfaces and is comfortable working at the bench as well as collaborating closely with design and global validation teams. Experience with buffer chips and server/enterprise memory applications is highly desirable

Component Bench Characterization

- Perform detailed bench characterization of high-speed memory devices using best-known measurement techniques and test methodologies.
- Apply de-embedding, high-impedance probing, noise mitigation, and signal integrity best practices to resolve complex measurement challenges at increasing data rates.
- Support Design and Validation teams in the characterization of key electrical and performance parameters.
- Work collaboratively with Designers and other cross functional teams to debug and optimize performance using open-ended tests not solely driven by specifications.

Validation Infrastructure Development

- Develop new test infrastructure to support effective characterization and validation of high-speed memory interfaces.
- Design and implement custom test procedures, scripts, and automation to improve test coverage and efficiency.
- Identify cycle-time and cost improvements, including automation, to improve validation efficiency.

Data Analysis and Reporting

- Synthesize results and identify the next set of relevant experiments to fully understand issues.
- Generate consistent, well-written, and easily understandable reports and presentations tailored to different audiences.
- Develop and validate creative uses of LLM/AI techniques to analyze large validation datasets, generate effective visualizations, and reduce cycle time to final reports.

Technical Communication

- Effectively document test methodologies and procedures to ensure reproducible and accurate results.
- Explain complex topics at an appropriate level of detail for each stakeholder.
- Work effectively with Validation Engineers across diverse regions, languages, and technical backgrounds.

Requirements

Bachelor's / Master’s degree in Electrical Engineering, Computer Engineering, or a related field.; 6+ years of hands-on experience in characterizing high-speed interfaces, particularly memory-related applications.; Strong understanding of memory interface architecture and operation, preferably DDR5.; In-depth knowledge of memory interface protocols and standards (e.g., JEDEC specifications).; Expertise in using typical high speed interface test equipment (BERT, Scope, Compliance S/W).; Proficiency in scripting languages (e.g., Python, Perl) for test automation and analysis.; Excellent analytical and problem-solving skills.; Strong communication and interpersonal skills.

Nice to have

Master's degree in Electrical Engineering or a related field.; Experience with advanced signal integrity measurements and applications for Design correlation.; Experience with modern software tools for data visualization, analysis, and reporting, in particular dynamic interactive tools – including LLMs