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FPGA Design Engineer, Radar

Reliable Robotics Corporation Seattle, United States
Full-time On-site work

Publication date: 09/11/2026

We're building safety-enhancing technology for aviation that will save lives. As an FPGA Design Engineer at Reliable Robotics you will be a part of the FPGA team which owns the firmware at the heart of the Reliable Robotics phased array radar. This role will focus on new advanced operational modes. FPGA designers at Reliable Robotics have a unique opportunity to work within a vertically integrated technology stack that extends up to the aircraft level, with a direct impact on the aircraft's capabilities and requirements. The position will be located at our facility in Seattle, WA. This position requires access to information that is subject to U.S. export controls.

Responsibilities

Be responsible for the entire lifecycle of the FPGA design including product architecture, implementation, synthesis, hardware integration, and testing for the Air to Air Radar solution; Coordinate with the avionics and radar teams to establish high-level FPGA requirements as well as hardware/software interfaces; Translate MATLAB algorithms to fixed point VHDL implementations; Conduct system architecture performance tradeoffs and verify real-time performance; Work in a collaborative development environment including mutual peer review to maintain high product quality

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent; 2+ years of full-cycle electronics hardware development experience in a professional environment; Professional experience designing FPGA digital logic using industry-standard design, simulation, and synthesis tools

Nice to have

Advanced degree in Electrical Engineering, Computer Engineering, or equivalent; Experience working with RADAR, RF Transceivers, and/or Software Defined Radio; Proven track record of product ownership including development and field support; Experience with safety-critical FPGA development (DO-254 level A/B or equivalent industry standard); Experience architecting, implementing, and verifying fixed point DSP algorithms; Comfortable with a fast-paced, agile/iterative development life cycle; Pragmatic, results-oriented work style
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