(Senior) Design Verification Engineer

Alif Semiconductor is looking for a motivated and experienced (Senior) Design Verification Engineer to join the Digital IC Design team in Oulu, Finland, responsible for Peripheral verification. The office is located in the Technology park and the local team has more than 30 employees. The role focuses on building context, forming relationships, and taking ownership of test development, including debugging verification failures and gate-level simulations.

Responsibilities

Join the Digital IC Design team responsible for Peripheral verification; Become familiar with the assigned block or IP; Take ownership of test development; Debug verification failures; Understand and debug gate-level simulations (GLS); Work as part of a highly skilled verification team

Requirements

University degree in Electrical Engineering, Information Technology, Embedded Systems or other similar degree; Skilled in UVM and System Verilog; Programming skills, Proficiency in C; Testbench architecture design; Knowledge of RTL design fundamentals; Clock domain Crossing (CDC); Knowledge of most generic serial protocols; Constrained random verification; Knowledge of microcontrollers with embedded arm processor cores; Team working and collaboration skills; Enthusiasm to learn and a can-do attitude

Nice to have

Knowledge or skills in GLS (gate-level simulation); Enthusiasm to learn and a can-do attitude